Extending Lifetime of Flash Memory Using Strong Error Correction Coding

被引:3
|
作者
Kim, Chanha [1 ]
Park, Chanik [2 ]
Yoo, Sungjoo [3 ]
Lee, Sunggu [1 ]
机构
[1] Pohang Univ Sci & Technol POSTECH, Dept Elect Engn, Pohang 790784, South Korea
[2] Samsung Elect, Memory Business Unit, Hwaseong 445330, South Korea
[3] Seoul Natl Univ, Dept Comp Sci & Engn, Seoul 151744, South Korea
关键词
NAND flash memory; error correction code; flash memory lifetime; reliability; SCHEME;
D O I
10.1109/TCE.2015.7150595
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Demand for flash memory based storage systems is on the rise because flash memory has many advantages when compared with hard disk drives, such as lower latency and resistance to physical shock. However, flash memory permits only a limited number of program/erase (P/E) cycles, and after the guaranteed number of P/E cycles, data cannot be reliably retrieved due to uncorrectable errors. Given a target bit error rate, the guaranteed number of P/E cycles decreases as more bits are stored in one cell and as the cell size is scaled down. In this paper, a novel lifetime extension mechanism for flash memory, referred to as a gradual error correction code (G-ECC), is proposed. A G-ECC provides a stronger level of error correction than a standard ECC by sacrificing a small portion of storage capacity in order to store additional parity bits. The proposed method can extend the lifetime of flash memory by 124% at the cost of a 12% loss in capacity. The use of additional parity bits necessarily leads to performance loss due to increased accesses for those additional parity bits and garbage collection operations involving those bits. Thus, methods to alleviate such performance loss are proposed; these methods reduce the performance overhead from 17% (without the proposed methods) to 3% even in the worst case.(1)
引用
收藏
页码:206 / 214
页数:9
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