An area-efficient switched-capacitor relaxation oscillator with digitally controlled frequency tunability

被引:2
|
作者
Ausin, Jose L. [1 ]
Ramos, J. [1 ]
Torelli, G. [2 ]
Duque-Carrillo, J. F. [1 ]
机构
[1] Univ Extremadura, Dept Elect & Elect Engn, E-06071 Badajoz, Spain
[2] Univ Pavia, Dept Elect, I-27100 Pavia, Italy
关键词
analog integrated circuits; switched-capacitor circuits; relaxation oscillator; analog scrambler;
D O I
10.1002/cta.542
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes a programmable low-jitter switched-capacitor (SC) square-wave oscillator for the use in a variety of voice-band signal-processing applications. The core of the circuit is a relaxation oscillator whose oscillation frequency programmability does not resort to variations either in capacitor values or in the sampling frequency. As a result, total capacitance is reduced and, hence, silicon area is minimized while low phase jitter and high resolution programmability are achieved. Simulation results referred to the design of an SC oscillator in 0.35-mu m CMOS technology are presented to demonstrate the feasibility of the proposed approach. Copyright (C) 2008 John Wiley & Sons, Ltd.
引用
收藏
页码:243 / 255
页数:13
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