Generation technique of 500MHz ultra-high speed algorithmic pattern
被引:6
作者:
Imada, H
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Imada, H
Fujisaki, K
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Fujisaki, K
Ohsawa, T
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Ohsawa, T
Tsuto, M
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Tsuto, M
机构:
来源:
INTERNATIONAL TEST CONFERENCE 1996, PROCEEDINGS
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1996年
关键词:
D O I:
10.1109/TEST.1996.557125
中图分类号:
TP3 [计算技术、计算机技术];
学科分类号:
0812 ;
摘要:
This paper describes the pattern generation for testing ultra-high speed memory devices. 500MHz algorithmic pattern can be generated by parallel operation with 4 pattern generators and arithmetic synthesis supported by a new pattern compiler.