共 17 条
[1]
Scaling constraints in nanoelectronic random-access memories
[J].
NANOTECHNOLOGY,
2005, 16 (10)
:2251-2260
[2]
Chen YC, 2003, 2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, P905
[4]
Flocke A., 2008, 2008 8th IEEE Conference on Nanotechnology (NANO), P319, DOI 10.1109/NANO.2008.101
[5]
Fundamental analysis of resistive nano-crossbars for the use in hybrid Nano/CMOS-memory
[J].
ESSCIRC 2007: PROCEEDINGS OF THE 33RD EUROPEAN SOLID-STATE CIRCUITS CONFERENCE,
2007,
:328-331
[6]
Haron N.Z., 2008, SIGNALS CIRCUITS SYS, P1
[7]
Nanoscale Memristor Device as Synapse in Neuromorphic Systems
[J].
NANO LETTERS,
2010, 10 (04)
:1297-1301
[8]
Kim G. H., 2010, NANOTECHNOLOGY, V21
[9]
2-stack 1D-1R cross-point structure with oxide diodes as switch elements for high density resistance RAM applications
[J].
2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2,
2007,
:771-+
[10]
Liang J., 2012, IEEE International Memory Workshop, P1