A scalable hardware library for the rapid prototyping of SDL specifications

被引：0

作者：

Dörfel, M ^{[1
]}

Slomka, F ^{[1
]}

Hofmann, R ^{[1
]}

机构：

[1] Univ Erlangen Nurnberg, Dept Comp Architecture & Performance Evaluat, D-91058 Erlangen, Germany

来源：

TENTH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEMS PROTOTYPING, PROCEEDINGS | 1999年

关键词：

D O I：

10.1109/IWRSP.1999.779041

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

A known problem in the area of hardware/software codesign is the selection of the proper interface between the different parts of the design. This paper presents a technique which eases the selection by combining different synthesis techniques together with rapid prototyping. Application field of the technique is the design of communication systems where C and VHDL are generated from a specification given in SDL. For the VHDL area, high-level synthesis is used to synthesize a behavioural description.

引用

页码：120 / 125

页数：6