共 26 条
[1]
[Anonymous], 1965, Electronics
[2]
A 6bit, 7mW, 250fJ, 700MS/s Subranging ADC
[J].
2009 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC),
2009,
:141-144
[3]
Linearity enhancement of multibit Delta Sigma and D/A converters using data weighted averaging
[J].
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING,
1995, 42 (12)
:753-762
[4]
Chun-Cheng Liu, 2010, 2010 IEEE International Solid-State Circuits Conference (ISSCC), P386, DOI 10.1109/ISSCC.2010.5433970
[5]
Gotoh K., 1986, Proceedings of the IEEE 1986 Custom Integrated Circuits Conference (Cat. No.86CH2258-2), P366
[9]
A 15b 20MS/s CMOS pipelined ADC with digital background calibration
[J].
2004 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS,
2004, 47
:454-455
[10]
Malla P., 2008, ISSCC DIG TECHN PAPE, P496