Dynamic compilation framework with DVS for reducing energy consumption in embedded processors

被引：3

作者：

Shi, Qingsong ^{[1
]}

Chen, Tianzhou ^{[1
]}

Liang, Xiao ^{[1
]}

Huang, Jiangwei ^{[1
]}

机构：

[1] Zhejiang Univ, Coll Comp Sci, Hangzhou 310003, Zhejiang, Peoples R China

来源：

PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS | 2008年

关键词：

dynamic compiler; DVS; run-time region;

D O I：

10.1109/ICESS.2008.47

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Dynamic Voltage Scaling (DVS) is an effective technique for reducing the energy consumption in embedded systems. There are several advantages using DVS technique into compiler framework. This paper present a framework for reducing energy consumption in embedded processors using the dynamic compiler collaborate with DVS technique. Two algorithms are implemented in this framework, and the framework is implemented using the Intel PIN systems and is deployed in a real hardware platform. Experimental results based on the software and hardware platform, show that significant energy saving are achieved while performance loss less than 5%.

引用

页码：464 / 470

页数：7