Transfer molding is the primary process for the IC (Integrated Circuit) encapsulation with EMC (Epoxy Molding Compound) and also the most extensive method for plastic packaging. Plastic encapsulated package offers many advantages over their other counterparts such as low cost, lightweight, and ready availability that accounted for approximately 98% of IC packages produced within the microelectronics industry. The recent trends in plastic packaging becomes thinner and smaller where drawbacks are more serious to package stress from transfer molding process. It is for the reason the needs of thorough understanding of package stress are becoming greater. In this paper, flow-induced package stress is experimentally visualized to analyze time-dependence flow characteristics of EMC by employing different geometrical gate design parameters. Also, EMC with different material properties are evaluated to quantify influence on package stress as interfacial adhesion, warpage, voiding, wire sweep, and penetration rate. In addition, screening DOE (Design of Experiment) is performed to identify main process parameters, as well as optimum window of critical parameters is defined by RSM (Response Surface Methodology).
