Arsenic ion implant energy effects on CMOS gate oxide hardness

被引：5

作者：

Draper, BL ^{[1
]}

Shaneyfelt, MR ^{[1
]}

Young, RW ^{[1
]}

Headley, TJ ^{[1
]}

Dondero, R ^{[1
]}

机构：

[1] Sandia Natl Labs, Albuquerque, NM 87185 USA

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2005年 / 52卷 / 06期

关键词：

integrated circuit radiation effects; ion implantation; MOSFETs; radiation hardening;

D O I：

10.1109/TNS.2005.860727

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Under conditions that were predicted as "safe" by well-established TCAD packages, radiation hardness can still be signiticantly degraded by a few lucky arsenic ions reaching the gate oxide during self-aligned CMOS source/drain ion implantation. The most likely explanation is that both oxide traps and interface traps are created when ions penetrate and damage the gate oxide after channeling or traveling along polysilicon grain boundaries during the implantation process.

引用

收藏

页码：2387 / 2391

页数：5

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