Automatic HDL generation for a DES codec for an encrypted NFS server based on an extended Petri net

In this paper, we propose a method for automatically generating the Hardware Description Language (HDL) source for a parallel pipelined DES enciphering circuit for the Network File System based on an extended Petri net. For this work, the authors have proposed an extended Petri net, called a "Logical Coloured Petri Nets (LCPN)", suitable for the design of complex control system processes and discuss its methods of evaluation First, the logical verification of a circuit and its timing checks based on zero-delays are done at the HDL level. Then, delay information for real devices are used to verify the timing and operation speeds at the FPGA level. It is the purpose of this research to improve the reliability of circuit operation at the time of design by verifying the correctness of pipeline and parallel operations with the proposed new technique.