Assertion-Based Functional Consistency Checking between TLM and RTL Models

被引:15
作者
Chen, Mingsong [1 ]
Mishra, Prabhat [2 ]
机构
[1] East China Normal Univ, Shanghai Key Lab Trustworthy Comp, Shanghai 200062, Peoples R China
[2] Univ Florida, Dept Comp & Informat Sci & Eng, Gainesville, FL 32611 USA
来源
2013 26TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2013 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID) | 2013年
基金
美国国家科学基金会;
关键词
assertion; functional consistency; TLM; RTL; VERIFICATION;
D O I
10.1109/VLSID.2013.208
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Transaction Level Modeling (TLM) is promising for functional validation at an early stage of System-on-Chip (SoC) design. However, raising the abstraction level brings a major challenge -how to guarantee the functional consistency between TLM specifications and Register Transfer Level (RTL) implementations? This paper proposes an efficient mechanism for functional consistency checking using assertion observability. The experimental results using several industrial designs demonstrate that our method can automatically check the functional consistency between different abstraction levels.
引用
收藏
页码:320 / 325
页数:6
相关论文
共 18 条
[1]  
[Anonymous], P GLSVLSI
[2]  
[Anonymous], P CODES ISSS
[3]  
[Anonymous], T LEV MOD SYSTEMC
[4]  
Bombieri N., 2006, P DATE, P1
[5]   Towards equivalence checking between TLM and RTL models [J].
Bombieri, Nicola ;
Fummi, Franco ;
Pravadelli, Graziano ;
Marques-Silva, Joao .
MEMOCODE'07: FIFTH ACM & IEEE INTERNATIONAL CONFERENCE ON FORMAL METHODS AND MODELS FOR CO-DESIGN, PROCEEDINGS, 2007, :113-+
[6]  
Chen M., 2012, System-Level Validation: High-Level Modeling and Directed Test Generation Techniques
[7]   Automatic RTL Test Generation from SystemC TLM Specifications [J].
Chen, Mingsong ;
Mishra, Prabhat ;
Kalita, Dhrubajyoti .
ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2012, 11 (02)
[8]   Property Learning Techniques for Efficient Generation of Directed Tests [J].
Chen, Mingsong ;
Mishra, Prabhat .
IEEE TRANSACTIONS ON COMPUTERS, 2011, 60 (06) :852-864
[9]   Implementation of a transaction level assertion framework in SystemC [J].
Ecker, Wolfgang ;
Esen, Volkan ;
Hull, Michael .
2007 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3, 2007, :894-899
[10]   Symbolic functional vector generation for VHDL specifications [J].
Ferrandi, F ;
Fummi, F ;
Gerli, L ;
Sciuto, D .
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS, 1999, :442-446