Leveraging IEEE 1850 PSL and Mixed-Signal Assertions for Post-silicon Verification of Automotive Power Devices

被引:2
作者
Nirmaier, Thomas [1 ]
Harrant, Manuel [1 ]
Eversmann, Bjoern [1 ]
Pelz, Georg [1 ]
机构
[1] Infineon Technol AG, Automot Power, Neubiberg, Germany
来源
2019 IEEE INTERNATIONAL TEST CONFERENCE INDIA (ITC INDIA) | 2019年
关键词
Requirements; Property Specification Language; Automotive; Mixed-Signal; Post-Silicon Verification;
D O I
10.1109/itcindia46717.2019.8979897
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
With the advent of new E/E architectures, autonomous driving and functional safety the amount of mixed-signal IC content in automobiles continues to rise. Consequently, post-silicon verification and validation accounts for a large portion of the development effort in these automotive smart power ICs. Unlike in fully digital devices there is no automated path to validate functionality of mixed-signal devices, which makes V&V a linear process in terms of effort, rising linear with the number of functional requirements to be covered. In the classical requirements-driven development flow each (human readable) requirement in the specification has to be converted to a machine-executable test and deployed afterward. Instead, formalization of functional requirements opens the path to automatic generation of tests out of functional requirements and thereby enables semi-formal verification. We present a post-Si targeted formalism of the IEEE 1850 Property Specification Language. We present results and examples from several automotive power and sensor devices.
引用
收藏
页数:6
相关论文
共 16 条
[1]  
Abelein U, 2012, DES AUT TEST EUROPE, P870
[2]  
[Anonymous], 2008, INT C COMP AID VER C
[3]  
[Anonymous], 1450 IEEE
[4]  
Bahrig G., 2017, INT TEST C ITC ART W
[5]  
Bhattacharya P., 2011, HARTONG MIXED SIGNAL
[6]  
Dobler M, 2015, DES AUT TEST EUROPE, P1036
[7]  
Foster H, 2009, QUANTIFYING FPGA VER
[8]  
Foster H., 2005, IEEE 1850 PSL NEXT G
[9]   PSL: Beyond hardware verification [J].
Glazberg, Ziv ;
Moulin, Mark ;
Orni, Avigail ;
Ruah, Sitvanit ;
Zarpas, Emmanuel .
NEXT GENERATION DESIGN AND VERIFICATION METHODOLOGIES FOR DISTRIBUTED EMBEDDED CONTROL SYSTEMS, 2007, :245-+
[10]  
Harrant M., 2014, DES AUT TEST EUR C E