Modeling mobility degradation in scanning capacitance microscopy for semiconductor dopant profile measurement

This paper addresses the influence of mobility degradation on the SCM measurement via modeling and comparison with experimental SCM data. The rational for looking into mobility effect is that SCM capacitance measurement is carried out at 915 MHz. At this frequency, resistance of semiconductor surface can be comparable to the reactance of the SCM capacitance. In our simulation carrier mobilities at the semiconductor surface are set low compared to their bulk values to reflect surface mobility degradation. Our results show that the simulated SCM dC/dV is significantly reduced in the vicinity of p-n junction reflecting what is observed in experiment. We attribute this to the fact that the capacitance between the inverted surface and the SCM probe is not detected due to the high resistance (compared to the reactance of the SCM capacitance) of the inversion layer below the semiconductor and oxide interface. Only the capacitance on the accumulation side is extracted thus leading to the lowering of the detected SCM capacitance and dC/dV. The major conclusion is that the effect of high resistance due to mobility degradation has to be treated carefully for accurate extraction of dopant profile from experimental SCM data.