A CMOS-Compatible, Low-Loss, and Low-Crosstalk Silicon Waveguide Crossing

被引：52

作者：

Zhang, Yi ^{[1
]}

Yang, Shuyu ^{[1
]}

Lim, Andy Eu-Jin ^{[2
]}

Lo, Guo-Qiang ^{[2
]}

Galland, Christophe ^{[1
]}

Baehr-Jones, Tom ^{[1
]}

Hochberg, Michael ^{[1
,2
,3
]}

机构：

[1] Univ Delaware, Dept Elect & Comp Engn, Newark, DE 19716 USA

[2] Agcy Sci Technol & Res, Inst Microelect, Singapore 138632, Singapore

[3] Natl Univ Singapore, Dept Elect & Comp Engn, Singapore 119077, Singapore

来源：

IEEE PHOTONICS TECHNOLOGY LETTERS | 2013年 / 25卷 / 05期

关键词：

Silicon on insulator technology; wafer scale integration; waveguide junctions; PHOTONIC WIRE;

D O I：

10.1109/LPT.2013.2241049

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We demonstrated a waveguide crossing for submicron silicon waveguides with average insertion loss of 0.18 +/- 0.03 dB and crosstalk of -41 +/- 2 dB, uniform across an 8-inch wafer. The device was fabricated in a CMOS-compatible process using 248 nm lithography, with only one patterning step.

引用

页码：422 / 425

页数：4

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