Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters

被引:44
作者
Guerrera, Stephen A. [1 ]
Velasquez-Garcia, Luis Fernando [2 ]
Akinwande, Akintunde Ibitayo [1 ]
机构
[1] MIT, Dept Elect Engn & Comp Sci, Cambridge, MA 02139 USA
[2] MIT, Microsyst Technol Labs, Cambridge, MA 02139 USA
关键词
Ballasting; cathodes; electron supply control; Si field-emission arrays; vertical ungated Si field-effect transistors (FETs); TURN-ON VOLTAGE; EMISSION ARRAYS; MASSIVE ARRAYS; CATHODES; UNIFORM; FETS; MICROELECTRONICS; FABRICATION; TIP;
D O I
10.1109/TED.2012.2204262
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We report the fabrication and characterization of high-aspect-ratio silicon pillar current limiters [vertical ungated field-effect transistors (FETs)] for ballasting individual field emitters within field-emitter arrays (FEAs). Dense (1-mu m pitch) FEAs that are individually ballasted by 100-nm-diameter and 10-mu m-tall current limiters were fabricated, resulting in an emitter tip radius under 10 nm. When characterized without field emitters, the vertical current limiters (ungated FETs) show current-source-like behavior, with saturation currents up to 15 pA/FET. When the current limiters are incorporated into large arrays of field emitters, the current-voltage characteristics of the FEA show evidence of current limitation at high extraction gate voltages. Emission current densities of over 200 mu A/cm(2) were obtained from 1.36 million emitter arrays with 5-mu m pitch.
引用
收藏
页码:2524 / 2530
页数:7
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