IIR Digital Filter Design using Xilinx System Generator for FPGA Implementation

被引:0
作者
Priya, P. [1 ]
Ashok, S. [2 ]
机构
[1] Natl Inst Technol Calicut, Post Grad Elect Engn Dept, Kozhikode, Kerala, India
[2] Natl Inst Technol Calicut, Dept Elect Engn, Kozhikode, Kerala, India
来源
PROCEEDINGS OF THE 2018 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATION AND SIGNAL PROCESSING (ICCSP) | 2018年
关键词
Digital Filter; Field Programmable Logic Gate Array; Infinite Impulse Response filter; Xilinx System Generator;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In general Application Specific Integrated Circuits (ASIC) and Digital Signal Processors (DSP) are usually used for implementing digital filters. As compared to the conventional methods available the speed of computation of digital filter is increased by implementing on Field Programmable Logic Gate Array (FPGA). This paper provides a novel design and implementation of digital filter in FPGA using a high level description tool like Xilinx System Generator. The designed filter with desired specification is analyzed in Simulink environment in MATLAB. A method for implementing IIR filter in FPGA using System Generator is proposed. The Xilinx system generator is used for synthesizing and simulation for FPGA filter analysis. The FPGA shows its high performance in terms of speed, memory, resource management, and power consumption.
引用
收藏
页码:54 / 57
页数:4
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