Identification of Si film traps in p-channel SOI FinFETs using low temperature noise spectroscopy

被引：10

作者：

Achour, H. ^{[1
,4
]}

Cretu, B. ^{[2
,3
]}

Simoen, E. ^{[5
]}

Routoure, J. -M. ^{[1
,3
]}

Carin, R. ^{[1
,3
]}

Benfdila, A. ^{[4
]}

Aoulaiche, M. ^{[5
]}

Claeys, C. ^{[5
,6
]}

机构：

[1] Univ Caen Basse Normandie, UMR GREYC 6072, F-14050 Caen, France

[2] ENSICAEN, UMR GREYC 6072, F-14050 Caen, France

[3] CNRS, UMR GREYC 6072, F-14032 Caen, France

[4] Mouloud Mammeri Univ Tizi Ouzou, GRMNT, Tizi Ouzou, Algeria

[5] IMEC, B-3001 Louvain, Belgium

[6] Katholieke Univ Leuven, EE Dept, B-3001 Louvain, Belgium

来源：

SOLID-STATE ELECTRONICS | 2015年 / 112卷

关键词：

SOI; FinFET; Strain engineering; Low temperature; Low frequency noise spectroscopy; Traps in silicon film; LOW-FREQUENCY NOISE;

D O I：

10.1016/j.sse.2015.02.014

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The aim of this study is to analyse the excess low frequency noise from 100 K up to room temperature in p-channel triple-gate standard and strained FinFET transistors fabricated on silicon on insulator (SOI) substrates. The low frequency noise measurements as a function of temperature can be successfully used as a non-destructive device characterisation tool in order to evaluate the quality of the silicon film and to identify traps induced during the device processing. Several identified traps which can be related to boron and carbon, in particular for strained substrate devices, were observed. (C) 2015 Published by Elsevier Ltd.

引用

页码：1 / 6

页数：6

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