Modeling and electrical analysis of seamless high off-chip connectivity (SHOCC) interconnects

Scaling down on-chip interconnect cross-sectional dimensions results not only in higher circuit wiring density, but also in the long lossy line problem, wherein the long lines become highly resistive and have unacceptable delays. One possible solution to the problem of long lossy lines is to transfer these fines off-chip using seamless high off-chip connectivity (SHOCC) technology, In this work, we modeled and studied the electrical performance of SHOCC signal lines, The performance of SHOCC interconnects was compared with that of typical on-chip interconnects, Modeling and simulation results, along with recommendations with regards to driver sizes and the type of interconnect that should be used, are presented.