Test Strategies for Reliable Runtime Reconfigurable Architectures

被引:16
作者
Bauer, Lars [1 ]
Braun, Claus [2 ]
Imhof, Michael E. [2 ]
Kochte, Michael A. [2 ]
Schneider, Eric [2 ]
Zhang, Hongyan [1 ]
Henkel, Joerg [1 ]
Wunderlich, Hans-Joachim [2 ]
机构
[1] Karlsruhe Inst Technol, Dept Comp Sci, Chair Embedded Syst, D-76131 Karlsruhe, Germany
[2] Univ Stuttgart, Inst Comp Architecture & Comp Engn, D-70569 Stuttgart, Germany
关键词
FPGA; reconfigurable architectures; online test; IN SELF-TEST; FAULT-TOLERANCE; INTERCONNECT; FPGAS;
D O I
10.1109/TC.2013.53
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Field-programmable gate array (FPGA)-based reconfigurable systems allow the online adaptation to dynamically changing runtime requirements. The reliability of FPGAs, being manufactured in latest technologies, is threatened by soft errors, as well as aging effects and latent defects. To ensure reliable reconfiguration, it is mandatory to guarantee the correct operation of the reconfigurable fabric. This can be achieved by periodic or on-demand online testing. This paper presents a reliable system architecture for runtime-reconfigurable systems, which integrates two nonconcurrent online test strategies: preconfiguration online tests (PRET) and postconfiguration online tests (PORT). The PRET checks that the reconfigurable hardware is free of faults by periodic or on-demand tests. The PORT has two objectives: It tests reconfigured hardware units after reconfiguration to check that the configuration process completed correctly and it validates the expected functionality. During operation, PORT is used to periodically check the reconfigured hardware units for malfunctions in the programmable logic. Altogether, this paper presents PRET, PORT, and the system integration of such test schemes into a runtime-reconfigurable system, including the resource management and test scheduling. Experimental results show that the integration of online testing in reconfigurable systems incurs only minimum impact on performance while delivering high fault coverage and low test latency.
引用
收藏
页码:1494 / 1507
页数:14
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