Design of an unsaturated core-based fault current limiter to tackle unsymmetrical faults

Due to increasing demand for electrical power in nowadays power grids, inevitably, the short circuit current will be increased. The power system faults are categorized in two groups: first, the symmetrical three-phase faults which generally caused by the carelessness of operating personnel and second, unsymmetrical faults which are very contingent in transmission system. The latter is the principal aim of this paper. Fault Current Limiter (FCL) is a device to limit the fault current. Conventional core-based FCLs have some drawbacks such as: (1) core losses and heat generation caused by permanent operation in saturation region under normal condition, (2) requiring two cores per phase that makes FCL bulky and (3) extra cost, losses as well as reducing reliability by using external DC source. This paper proposes a novel method for limiting unsymmetrical faults current. The suggested design employs a common unsaturated core for all three phases in order to limit of the first cycle of fault current automatically and without fast detection systems; employment of thyristor controlled braking resistor (TCBR) is considered for eliminating the imposed over-voltages on faultless lines and further limitation of fault current. Simulations and design aspects of implementing practical issues show the validity of the proposal.