Simulation study on FinFET with tri-material gate

被引:0
|
作者
Li, Cong [1 ]
Zhuang, Yiqi [1 ]
Zhang, Li [1 ]
机构
[1] Xidian Univ, Sch Microelect, Xian 710071, Peoples R China
来源
2012 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID STATE CIRCUIT (EDSSC) | 2012年
关键词
FinFET; numerical simulation; tri-material gate; short-channel effects; hot-carrier effects;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a novel tri-material gate (TMG) FinFET device is proposed. Using three-dimensional (3-D) device simulator, hot-carrier effects and short-channel effects of TMG FinFET are investigated and compared with that of dual-material gate FinFET and conventional FinFET. Numerical simulation results shows that TMG FinFET exhibits significantly improved performance in terms of surface potential, electric field and carrier velocity distribution.
引用
收藏
页数:3
相关论文
共 50 条
  • [21] Fault Simulation and Test Pattern Generation for Cross-gate Defects in FinFET Circuits
    Chiang, Kuan-Ying
    Ho, Yu-Hao
    Chen, Yo-Wei
    Pan, Cheng-Sheng
    Li, James Chien-Mo
    2015 IEEE 24TH ASIAN TEST SYMPOSIUM (ATS), 2015, : 181 - 186
  • [22] Fabrication, characterization and simulation of Ω-gate twin poly-Si FinFET nonvolatile memory
    Yeh, Mu-Shih
    Wu, Yung-Chun
    Hung, Min-Feng
    Liu, Kuan-Cheng
    Jhan, Yi-Ruei
    Chen, Lun-Chun
    Chang, Chun-Yen
    NANOSCALE RESEARCH LETTERS, 2013, 8
  • [23] Impact of fin thickness and height on Read Stability / Write Ability in Tri-Gate FinFET based SRAM
    Lee, Junha
    Jeong, Hanwool
    Yang, Younghwi
    Kim, Jisu
    Jung, Seong-Ook
    2012 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2012, : 479 - 482
  • [24] Fabrication, characterization and simulation of Ω-gate twin poly-Si FinFET nonvolatile memory
    Mu-Shih Yeh
    Yung-Chun Wu
    Min-Feng Hung
    Kuan-Cheng Liu
    Yi-Ruei Jhan
    Lun-Chun Chen
    Chun-Yen Chang
    Nanoscale Research Letters, 8
  • [25] Simulation and Drain Current Performance analysis of High-K Gate Dielectric FinFET
    M. Aditya
    K. Srinivasa Rao
    K. Girija Sravani
    Koushik Guha
    Silicon, 2022, 14 : 4075 - 4078
  • [26] Impact of optimization on high-k material gate spacer in DG-FinFET device
    Roslan, Ameer F.
    Salehuddin, F.
    Zain, A. S. M.
    Kaharudin, K. E.
    PROCEEDINGS OF MECHANICAL ENGINEERING RESEARCH DAY 2019 (MERD'19), 2019, : 150 - 151
  • [27] Stringer Gate FinFET on Bulk Substrate
    Han, Jin-Woo
    Wong, Hiu Yung
    Moon, Dong-Il
    Braga, Nelson
    Meyyappan, M.
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2016, 63 (09) : 3432 - 3438
  • [28] Effects of Gate Process on NBTI Characteristics of TiN Gate FinFET
    Kim, Jin Ju
    Cho, Moonju
    Pantisano, Luigi
    Chiarella, Thomas
    Togo, Mitsuhiro
    Horiguchi, Naoto
    Groeseneken, Guido
    Lee, Byoung Hun
    2012 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2012,
  • [29] The Observation of Width Quantization Impact on Device Performance and Reliability for High-k/Metal Tri-Gate FinFET
    Yeh, Wen-Kuan
    Zhang, Wenqi
    Yang, Yi-Lin
    Dai, An-Ni
    Wu, Kehuey
    Chou, Tung-Huan
    Lin, Cheng-Li
    Gan, Kwang-Jow
    Shih, Chia-Hung
    Chen, Po-Ying
    IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2016, 16 (04) : 610 - 616
  • [30] Multi-Gate FinFET Mixer Variability Assessment Through Physics-Based Simulation
    Bughio, A. M.
    Guerrieri, S. Donati
    Bonani, F.
    Ghione, G.
    IEEE ELECTRON DEVICE LETTERS, 2017, 38 (08) : 1004 - 1007