Heterogeneous integration of enhancement mode In0.7Ga0.3As quantum well transistor on silicon substrate using thin (≤ 2 gm) composite buffer architecture for high-speed and low-voltage (0.5V) logic applications

被引:104
作者
Hudait, M. K. [1 ]
Dewey, G. [1 ]
Datta, S. [1 ]
Fastenau, J. M. [2 ]
Kavalieros, J. [1 ]
Liu, W. K. [2 ]
Lubyshev, D. [2 ]
Pillarisetty, R. [1 ]
Rachmady, W. [1 ]
Radosavljevic, M. [1 ]
Rakshit, T. [1 ]
Chau, Robert [1 ]
机构
[1] Intel Corp, Technol & Mfg Grp, Hillsboro, OR 97124 USA
[2] IQE Inc, Bethlehem, PA USA
来源
2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 | 2007年
关键词
D O I
10.1109/IEDM.2007.4419017
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This paper describes for the first time, the heterogeneous integration of In0.7Ga0.3As quantum well device structure on Si substrate through a novel, thin composite metamorphic buffer architecture with the total composite buffer thickness successfully scaled down to 1.3 mu m, resulting in high-performance short-channel enhancement-mode In0.7Ga0.3As QWFETs on Si substrate for future high-speed digital logic applications at low supply voltage such as 0.5V.
引用
收藏
页码:625 / +
页数:3
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