Protocol wrappers for layered network packet processing in reconfigurable hardware

被引:30
作者
Braun, F
Lockwood, J
Waldvogel, M
机构
[1] Washington Univ, Dept Comp Sci, Appl Res Lab, St Louis, MO 63130 USA
[2] Univ Stuttgart, D-7000 Stuttgart, Germany
[3] IBM Zurich, Res Lab, Zurich, Switzerland
基金
美国国家科学基金会;
关键词
This research was supported in part by NSF ANI-0096052 and Xilinx and was conducted while all of the authors were based at Washington University in St. Louis;
D O I
10.1109/40.988691
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A network platform called the Field-Programmable Port Extender (FPX) streamlines and simplifies network transmission processing directly in hardware.
引用
收藏
页码:66 / 74
页数:9
相关论文
共 18 条
[1]  
ARNOULD EA, 1989, P 3 INT C ARCH SUPP, P205
[2]   Fast incremental CRC updates for IP over ATM networks [J].
Braun, F ;
Waldvogel, M .
2001 IEEE WORKSHOP ON HIGH PERFORMANCE SWITCHING AND ROUTING, 2001, :48-52
[3]  
BRAUN F, 2001, P FIELD PROGR LOG AP, P254
[4]  
CHANEY T, 1996, WUCS9607 APL RES LAB
[5]  
DITTA Z, 1997, P IEEE INFOCOM 1997, P179
[6]  
EATHERTON WN, 2001, ARLWN9801 WASH U ST
[7]  
FU H, 2001, WUCS0114
[8]  
*INT ENG TASK FORC, 1995, 1812 IETF RFC
[9]  
*INT TEL UN, 1991, I363 INT TEL UN
[10]  
Lockwood J. W., 2000, FPGA'00. ACM/SIGDA International Symposium on Field Programmable Gate Arrays, P137, DOI 10.1145/329166.329196