Clockless, Continuous-Time Analog Correlator Using Time-Encoded Signal Processing Demonstrating Asynchronous CDMA for Wake-Up Receivers

被引:20
作者
Mangal, Vivek [1 ]
Kinget, Peter R. [1 ]
机构
[1] Columbia Univ, Dept Elect Engn, New York, NY 10027 USA
关键词
Code-division multiple access (CDMA); continuous-time (CT) correlator; wake-up receiver; SYSTEMS;
D O I
10.1109/JSSC.2020.2980526
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A clockless, continuous-time (CT) analog correlator circuit realization is presented based on time-encoded analog signal processing. Voltage-controlled oscillators (VCOs) transform the analog voltage signals into time-encoded analog signals and, in the process, perform signal integration; CT, digital-style delay cells combined with phase-frequency detectors followed by capacitive summers implement a CT matched filter. The correlator prototype designed in 65-nm CMOS-LP technology consumes 37 nW from 0.54 V and is used in the baseband of a wake-up receiver to despread asynchronous code-division multiple access (CDMA) codes and demonstrate code-domain filtering for an 11-bit Barker code. The wake-up receiver's sensitivity is enhanced by 2 dB to -80.9 dBm for a missed detection ratio of 10(-3), and its selectivity is improved by 5 dB, thanks to the use of the correlator. Simultaneous wake-up using CDMA is demonstrated with selective responses of the receiver to different desired codes in the presence of an undesired code.
引用
收藏
页码:2069 / 2081
页数:13
相关论文
共 27 条
[1]   PN acquisition and tracking performance in DS/CDMA systems with symbol-length spreading sequences [J].
Braun, WR .
IEEE TRANSACTIONS ON COMMUNICATIONS, 1997, 45 (12) :1595-1601
[2]   Low energy operation in WSNs: A survey of preamble sampling MAC protocols [J].
Cano, C. ;
Bellalta, B. ;
Sfairopoulou, A. ;
Oliver, M. .
COMPUTER NETWORKS, 2011, 55 (15) :3351-3363
[3]   CMOS ring oscillator with quadrature outputs and 100 MHz to 3.5 GHz tuning range [J].
Grözing, M ;
Phillip, B ;
Berroth, M .
ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2003, :679-682
[4]  
Jiang H., 2019, IEEE J SOLID-ST CIRC, P1
[5]   Device mismatch and tradeoffs in the design of analog circuits [J].
Kinget, PR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (06) :1212-1224
[6]  
Mackowiak Y.M.V., CISC VIS NETW IND GL
[7]   Sub-nW Wake-Up Receivers With Gate-Biased Self-Mixers and Time-Encoded Signal Processing [J].
Mangal, Vivek ;
Kinget, Peter R. .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2019, 54 (12) :3513-3524
[8]  
Mangal V, 2019, IEEE RAD FREQ INTEGR, P259
[9]  
Mangal V, 2019, ISSCC DIG TECH PAP I, V62, P438, DOI 10.1109/ISSCC.2019.8662418
[10]   A Wake-Up Receiver With a Multi-Stage Self-Mixer and With Enhanced Sensitivity When Using an Interferer as Local Oscillator [J].
Mangal, Vivek ;
Kinget, Peter R. .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2019, 54 (03) :808-820