OPTICAL TECHNOLOGIES FOR TSV INSPECTION

被引:0
作者
Aiyer, Arun A. [1 ]
Maltsev, Nikolai [1 ]
Ryu, Jae [1 ]
机构
[1] Frontier Semicond, 2127 Ringwood Ave, San Jose, CA 95131 USA
来源
METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XXVIII | 2014年 / 9050卷
关键词
Virtual Interface Technology; TSV; Bottom CD; Profile; mu Raman; Keep-out-zone;
D O I
10.1117/12.2045705
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, Frontier Semiconductor will introduce a new technology that is referred to as Virtual Interface Technology (VITTM). VITTM is a Fourier domain technique that utilizes temporal phase shear of the measurement beam. The unique configuration of the sensor enables measurement of wafer and bonded stack thicknesses ranging from a few microns to millimeters with measurement repeatability similar to nm and resolution of approximately 0.1% of nominal thickness or depth. We will present data on high aspect ratio via measurements (depth, top critical dimension, bottom critical dimension, via bottom profile and side wall angle), bonded wafer stack thickness, and Cu bump measurements. A complimentary tool developed at FSM is a high resolution Raman spectrometer to measure stress-change in Si lattice induced by Through Silicon Via (TSV) processes. These measurements are important to determine Keep-Out-Zone in the areas where devices are built so that the engineered gate strain is not altered by TSV processing induced strain. Applications include via post-etch; via post fill, and bottom Cu nail stress measurements. The capabilities of and measurement results from both tools are discussed below.
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页数:11
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  • [1] [Anonymous], 2013, NCCAVS JOINT US GROU