A high-speed transputer-based data acquisition system

A 250 MHz 8-bit transputer-based data acquisition VME bus module is described. This module has been designed as the acquisition node of a transputer-based real-time processing and data reduction system for the reflectometry diagnostic in the ASDEX Upgrade tokamak experiment. The architecture of the board is detailed, emphasizing the advantages of using recently delivered devices, like fast synchronous FIFOs, in a mixed ECL/TTL data acquisition architecture. It is shown that the implemented architecture leads naturally to the implementation of hardware triggers that allow the acquisition channels to operate as stand-alone modules in a self-triggered, self-timed, data acquisition mode. The advantages of using transputers as local control and processing units are discussed. The use of the board in the reflectometry diagnostic and the general processing goals of the system are presented together with data characterizing the performance of the acquisition channels.