Analysis of Signal Integrity(SI) Robustness in Through-Silicon Interposer (TSI) Interconnects

被引:0
|
作者
Weerasekera, Roshan [1 ]
Cubillo, Joseph Romen [1 ]
Katti, Guruprasad [1 ]
机构
[1] ASTAR, Inst Microelect, Singapore 117685, Singapore
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes the electrical characteristics of the tine pitch interconnects in silicon carrier systems. The characteristics of such interconnects are explored and a typical FPGA-memory system is compared viz-a-viz with a traditional PCB system from low data rates to higher data rates. Our case-study shows that even though highly resistive wires are used in silicon carrier the interconnects are SI robust due to the shorter die to die interconnect length and the absence of package parasitics.
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页码:397 / 400
页数:4
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