Multi-aggressor capacitive and inductive coupling noise modeling and mitigation

被引：3

作者：

Vishnyakov, Victoria ^{[1
]}

Friedman, Eby G. ^{[2
]}

Kolodny, Avinoam ^{[1
]}

机构：

[1] Technion Israel Inst Technol, Dept Elect Engn, IL-32000 Haifa, Israel

[2] Univ Rochester, Dept Elect & Comp Engn, Rochester, NY 14627 USA

来源：

MICROELECTRONICS JOURNAL | 2012年 / 43卷 / 04期

关键词：

Crosstalk; Inductive coupling; Multi-aggressor; Modeling; Resistance inductance capacitance (RLC) interconnect; On-chip global interconnect; CROSSTALK NOISE; VERIFICATION;

D O I：

10.1016/j.mejo.2011.12.007

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Crosstalk noise in on-chip interconnect plays a major role in the performance of modern integrated circuits. Multi-aggressor capacitive and inductive coupling complicates both the modeling and mitigation of the noise. A novel method to model and analyze noise in RLC multi-line structures is proposed in this paper, exhibiting an error of up to 9% as compared to SPICE. This method is physically intuitive since it decomposes the noise produced by each of the aggressors into individual capacitive and inductive noise sources. The proposed model and related layout noise mitigation guidelines are applied to crosstalk noise reduction in multi-line structures. (C) 2012 Elsevier Ltd. All rights reserved.

引用

页码：235 / 243

页数：9

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