A 1.2 V low-power OpAmp for integrated lock-in amplifiers

被引:0
作者
Valero, M. R. [1 ]
Celma, S. [1 ]
Medrano, N. [1 ]
Calvo, B. [1 ]
Gimeno, C. [1 ]
机构
[1] Univ Zaragoza, Grp Elect Design I3A, E-50009 Zaragoza, Spain
来源
VLSI CIRCUITS AND SYSTEMS VI | 2013年 / 8764卷
关键词
Analog circuits; CMOS integrated circuits; low-voltage low-power design; amplifiers; lock-in amplifiers;
D O I
10.1117/12.2017218
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a simple 1.2 V low-power rail-to-rail class AB operational amplifier (OpAmp) suitable for integrated lock-in amplifiers. The proposed OpAmp has been designed in a standard 0.18 mu m CMOS technology. For a 1.2 V single supply and 68.6 mu W power consumption, simulations shows a 81 dB open loop gain, 64 degrees phase margin, 13 MHz unity gain frequency for a capacitive load of 10pF and 75 dB CMRR. Adaptive biasing provides 30.7 V/mu s slew-rate for a 10 pF load. A compact and reliable lock-in amplifier (LIA) has been designed using the proposed circuit. The designed LIA has a power consumption of 135 mu W and recovers signals up to 1 MHz with relative errors below 2.6 % for noise and interference signals of the same amplitude as the signal of interest.
引用
收藏
页数:7
相关论文
共 9 条
[1]  
Aguirre J., 2011, IET ELECT LETT, V47
[2]  
D'Amico A., 2008, SENSOR ACTUATOR, V44, P400
[3]  
Gnudi A., 1999, ESSCIRC'99. Proceedings of the 25th European Solid-State Circuits Conference, P58
[4]  
Maya-Hernández PM, 2012, IEEE INT SYMP CIRC S, P668, DOI 10.1109/ISCAS.2012.6272121
[5]   Very low-voltage analog signal processing based on quasi-floating gate transistors [J].
Ramírez-Angulo, J ;
López-Martín, AJ ;
Carvajal, RG ;
Chavero, FM .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (03) :434-442
[6]  
Ramirez-Angulo J., 2013, ANALOG RF MIXED SIGN
[7]  
Stanford Research Systems, 1999, LOCK IN AMPL
[8]  
Valero M. R., 2012, IEEE T CIRCUITS SY 2, V59
[9]  
Wang A., 2010, SUBTHRESHOLD DESIGN