Efficient Models for Non-Quasi-Static Effects and Correlated Noise in SiGe HBTs

被引：0

作者：

Augustine, Noel ^{[1
]}

Kumar, Khamesh ^{[1
]}

Chakravorty, Anjan ^{[1
,2
]}

Bhattacharyya, Arkaprava ^{[2
]}

Zimmer, Thomas ^{[2
]}

机构：

[1] Indian Inst Technol, Dept Elect Engn, Madras 600036, Tamil Nadu, India

[2] Univ Bordeaux, F-33405 Talence, France

来源：

2012 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID STATE CIRCUIT (EDSSC) | 2012年

关键词：

SiGe HBT; NQS effects; LCR network; minority charge partitioning; CR sub circuit; correlated noise; EXCESS PHASE; SIMULATION;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The capability of a single CR sub-circuit to model a wide range of non-quasi-static (NQS) delays in silicon germanium heterojunction bipolar transistors is explored. A comparative study is carried out to show that the suitable use of a single CR sub-circuit following the partitioned-charge-based approach can replace the popularly used CR-LCR combination to model both the input and output NQS effects. Based on this NQS model, a correlated noise model is developed, which requires only three additional nodes for implementation in Verilog-A. Results show excellent agreement with numerically simulated data.

引用

页数：4

共 12 条

[1] Modeling Non-Quasi-Static Effects in SiGe HBTs Using Improved Charge Partitioning Scheme [J].

Augustine, Noel ;

Kumar, Khamesh ;

Bhattacharyya, Arkaprava ;

Zimmer, Thomas ;

Chakravorty, Anjan .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (09) :2542-2545

[2]

Corallo G, 2004, PERIMETRY UPDATE 2002/2003, P97

[3] EFFICIENT METHOD FOR COMPUTER-AIDED NOISE-ANALYSIS OF LINEAR-AMPLIFIER NETWORKS [J].

HILLBRAND, H ;

RUSSER, PH .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1976, 23 (04) :235-238

[4] Modeling Nonquasi-Static Effects in SiGe HBTs [J].

Jacob, Jobymol ;

DasGupta, Amitava ;

Schroeter, Michael ;

Chakravorty, Anjan .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (07) :1559-1566

[5]

Kumar K, 2011, IEEE BIPOL BICMOS, P183, DOI 10.1109/BCTM.2011.6082777

[6]

McAndrew CC, 2003, NANOTECH 2003, VOL 2, P278

[7] Verilog-A Modeling of BJT NQS Excess Phase [J].

McAndrew, Colin C. ;

Huszka, Zoltan ;

Coram, Geoffrey .

PROCEEDINGS OF THE 2008 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 2008, :73-+

[8]

Reisch M., 2003, High-Frequency Bipolar Transistors, Physics Modeling, Applications

[9]

Sakalas P., 2006, P IEEE BCTM, P1

[10] TRANSIENT AND SMALL-SIGNAL HIGH-FREQUENCY SIMULATION OF NUMERICAL DEVICE MODELS EMBEDDED IN AN EXTERNAL CIRCUIT [J].

SCHROTER, M .

COMPEL-THE INTERNATIONAL JOURNAL FOR COMPUTATION AND MATHEMATICS IN ELECTRICAL AND ELECTRONIC ENGINEERING, 1991, 10 (04) :377-387

← 1 2 →