A 400 Mb/s∼2.5 Gb/s Referenceless CDR IC Using Intrinsic Frequency Detection Capability of Half-Rate Linear Phase Detector

被引:10
作者
Byun, Sangjin [1 ]
机构
[1] Dongguk Univ Seoul, Div Elect & Elect Engn, Seoul 100715, South Korea
关键词
Clock and data recovery; CMOS integrated circuits; frequency detection; linear phase detector; 65 NM CMOS; RECOVERY CIRCUIT; REFERENCE CLOCK; ACQUISITION; TRANSCEIVER;
D O I
10.1109/TCSI.2016.2587751
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 400 Mb/s similar to 2.5 Gb/s referenceless clock and data recovery (CDR) IC is presented. This paper shows that the half-rate linear phase detector (PD) has not only phase detection capability but also single-sided frequency detection capability in itself. By using this intrinsic frequency detection capability of the half-rate linear PD, a CDR can be implemented in the single loop architecture without both an external reference clock and a separate frequency detector. For verification, a prototype CDR IC was fabricated in a 0.13 mu m CMOS process. With 2.5 Gb/s, 2(31) - 1 pseudorandom binary sequence (PRBS), the measurement results show that the frequency acquisition time is 17 mu s, the bit error rate (BER) is better than 10(-12), the jitter of the recovered clock is 8.6 ps(rms) and the out-of-band jitter tolerance is 0.32 UIpp.
引用
收藏
页码:1592 / 1604
页数:13
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