Single-electron transistor: review in perspective of theory, modelling, design and fabrication

被引:10
|
作者
Patel, Rashmit [1 ]
Agrawal, Yash [2 ]
Parekh, Rutu [2 ]
机构
[1] Space Applicat Ctr ISRO SEPD SEG SEDA, Ahmadabad, Gujarat, India
[2] Dhirubhai Ambani Inst Informat & Commun Technol D, Gandhinagar, Gujarat, India
来源
MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS | 2021年 / 27卷 / 05期
关键词
LOGIC-CIRCUITS; SIMULATION; TEMPERATURE; DEVICES; MEMORY;
D O I
10.1007/s00542-020-05002-5
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Integrated circuit (IC) technology has grown tremendously over the last few decades. The prime goal has been to achieve low-power and high-performance in logic and memory devices with minimal footprint. This has lead to continuous scaling of devices and interconnects over silicon chips. Scaling of technology plays an important role for improvement of IC performance in terms of delay, signal-integrity and power-dissipation. Novel devices like FinFET, nano-electromechanical systems, graphene-FETs and single-electron transistor (SET) offer several advantages over various shortcomings of scaling. The future of IC industry is proposed to be heterogeneous 3D integration of different technologies. A SET is a potential nano device that works on quantum mechanical principle and can be co-integrated with the widely adopted complementary metal-oxide semiconductor technology to enhance its performance at scaled technology nodes. To explore the feasibility of SET, an extensive literature review has been carried out in this paper. The literature review comprises comprehensively research work related to SET theory, design and fabrication. Also, the SET based computing system design is presented for room temperature operation. The extensive literature review and thereafter execution of varying analyses reveal that the SET is a potential nano-device for futuristic applications.
引用
收藏
页码:1863 / 1875
页数:13
相关论文
共 50 条
  • [1] Single-electron transistor: review in perspective of theory, modelling, design and fabrication
    Rashmit Patel
    Yash Agrawal
    Rutu Parekh
    Microsystem Technologies, 2021, 27 : 1863 - 1875
  • [2] A nanodamascene process for advanced single-electron transistor fabrication
    Dubuc, Christian
    Beauvais, Jacques
    Drouin, Dominique
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2008, 7 (01) : 68 - 73
  • [3] Modelling the Single-Electron Transistor with Piecewise Linear Functions
    Sarmiento-Reyes, Arturo
    Hernandez-Martinez, Luis
    Angel Gutierrez de Anda, Miguel
    Castro Gonzalez, Francisco Javier
    2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2, 2009, : 241 - 244
  • [4] A SINGLE-ELECTRON TRANSISTOR
    不详
    IEEE SPECTRUM, 1991, 28 (02) : 19 - 19
  • [5] THE SINGLE-ELECTRON TRANSISTOR
    KASTNER, MA
    REVIEWS OF MODERN PHYSICS, 1992, 64 (03) : 849 - 858
  • [6] Proximity effect of electron beam lithography for single-electron transistor fabrication
    Hu, SF
    Sung, CL
    Huang, KD
    Wan, YM
    APPLIED PHYSICS LETTERS, 2004, 85 (17) : 3893 - 3895
  • [7] Single-electron transistor backaction on the single-electron box
    Turek, BA
    Lehnert, KW
    Clerk, A
    Gunnarsson, D
    Bladh, K
    Delsing, P
    Schoelkopf, RJ
    PHYSICAL REVIEW B, 2005, 71 (19):
  • [8] Theory of activated conduction in a Si single-electron transistor
    NTT Basic Research Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa 243-0198, Japan
    Microelectron Eng, 1 (205-207):
  • [9] Theory of activated conduction in a Si single-electron transistor
    Tamura, H
    Takahashi, Y
    Murase, K
    MICROELECTRONIC ENGINEERING, 1999, 47 (1-4) : 205 - 207
  • [10] FABRICATION AND MEASUREMENT OF A NB BASED SUPERCONDUCTING SINGLE-ELECTRON TRANSISTOR
    HARADA, Y
    HAVILAND, DB
    DELSING, P
    CHEN, CD
    CLAESON, T
    APPLIED PHYSICS LETTERS, 1994, 65 (05) : 636 - 638