Principle of CMOS circuit power-delay optimization with transistor sizing

被引：0

作者：

Yuan, JR ^{[1
]}

Svensson, C ^{[1
]}

机构：

[1] LINKOPING UNIV,DEPT PHYS & MEASUREMENT TECHNOL,S-58183 LINKOPING,SWEDEN

来源：

ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 1 | 1996年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：637 / 640

页数：4

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