An Efficient FPGA-Based Architecture for Convolutional Neural Networks

被引：0

作者：

Hwang, Wen-Jyi ^{[1
]}

Jhang, Yun-Jie ^{[1
]}

Tai, Tsung-Ming ^{[1
]}

机构：

[1] Natl Taiwan Normal Univ, Dept Comp Sci & Informat Engn, Taipei, Taiwan

来源：

2017 40TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP) | 2017年

关键词：

artificial vision systems; convolutional neural networks; field programmable gate array; hardware architecture; pipeline operations; COPROCESSOR;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

The goal of this paper is to implement an efficient FPGA-based hardware architectures for the design of fast artificial vision systems. The proposed architecture is capable of performing classification operations of a Convolutional Neural Network (CNN) in realtime. To show the effectiveness of the architecture, some design examples such as hand posture recognition, character recognition, and face recognition are provided. Experimental results show that the proposed architecture is well suited for embedded artificial computer vision systems requiring high portability, high computational speed, and accurate classification.

引用

页码：582 / 588

页数：7

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