Carrier-based modulation strategies for a neutral point clamped inverter

This article presents carrier-based modulation strategies for a neutral point clamped inverter that substantially reduces harmonics in the output line to line voltages, phase voltages, reference voltages and common mode voltage. A graphical technique that has already been proposed in the literature and that also allows various carrier disposition modulation strategies for a diode clamped inverter is being described here. For this graphical technique two new modulation strategies-alternative phase opposite disposition (APOD) and phase disposition (PD)-are being used to create reduced harmonics for diode-clamped inverters under both continuous and discontinuous switching conditions. These strategies can be further expanded in a very simple way. A comparison of conventional-, APOD- and PD-strategies will be given by simulation results by using the software 'Simplorer' and 'Post Processor Day'. The common mode voltage has been reduced particularly with PD-strategy. The strategies have been confirmed using a three level inverter for medium voltage.