ATTILA:: A cycle-level execution-d riven simulator for modern GPU Architectures

被引:0
|
作者
Moya Del Barrio, Victor [1 ]
González, Carlos [1 ]
Roca, Jordi [1 ]
Fernández, Agustín [1 ]
机构
[1] Univ Politecn Cataluna, Dept Comp Architecture, E-08028 Barcelona, Spain
来源
ISPASS 2006: IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE | 2006年
关键词
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中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The present work-presents a cycle-level execution-driven simulator for modern GPU architectures. We discuss the simulation model used for our GPU simulator; based in the concept of boxes and signals, and the relation between the timing simulator and the functional emulator The simulation model we use helps to increase the accuracy and reduce the number of errors in the timing simulator while allowing for an easy extensibility of the simulated GPU architecture. We also introduce the OpenGL framework used to feed the simulator with traces fiom real applications (UT2004, Doom3) and a performance debugging tool (Signal Trace Visualizer). The presented,ATTILA simulator supports the simulation of a whole range of GPU configurations and architectures, from the embedded segment to the high end PC segment, supporting both the unified and non unified shader architectural models.
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页码:231 / +
页数:2
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