A systematic literature review on hardware implementation of artificial intelligence algorithms

被引：96
作者：
Abu Talib, Manar [1 ]
Majzoub, Sohaib [1 ]
Nasir, Qassim [1 ]
Jamal, Dina [1 ]
机构：
[1] Univ Sharjah, Sharjah, U Arab Emirates
来源：
JOURNAL OF SUPERCOMPUTING | 2021年 / 77卷 / 02期
关键词：
Hardware accelerators; Artificial intelligence; Machine learning; AI on hardware; Real-time AI; FOREGROUND OBJECT SEGMENTATION; DEEP NEURAL-NETWORKS; REAL-TIME; FACE DETECTION; FPGA; ACCELERATOR; CLASSIFICATION; ARCHITECTURE; CNN;
D O I：
10.1007/s11227-020-03325-8
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Artificial intelligence (AI) and machine learning (ML) tools play a significant role in the recent evolution of smart systems. AI solutions are pushing towards a significant shift in many fields such as healthcare, autonomous airplanes and vehicles, security, marketing customer profiling and other diverse areas. One of the main challenges hindering the AI potential is the demand for high-performance computation resources. Recently, hardware accelerators are developed in order to provide the needed computational power for the AI and ML tools. In the literature, hardware accelerators are built using FPGAs, GPUs and ASICs to accelerate computationally intensive tasks. These accelerators provide high-performance hardware while preserving the required accuracy. In this work, we present a systematic literature review that focuses on exploring the available hardware accelerators for the AI and ML tools. More than 169 different research papers published between the years 2009 and 2019 are studied and analysed.
引用
收藏
页码：1897 / 1938
页数：42
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