Quasi-two-dimensional threshold voltage model for junctionless cylindrical surrounding gate metal-oxide-semiconductor field-effect transistor with dual-material gate
被引:8
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作者:
Li Cong
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机构:
Xidian Univ, Sch Microelect, Xian 710071, Peoples R ChinaXidian Univ, Sch Microelect, Xian 710071, Peoples R China
Li Cong
[1
]
Zhuang Yi-Qi
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机构:
Xidian Univ, Sch Microelect, Xian 710071, Peoples R ChinaXidian Univ, Sch Microelect, Xian 710071, Peoples R China
Zhuang Yi-Qi
[1
]
Zhang Li
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机构:
Xidian Univ, Sch Microelect, Xian 710071, Peoples R ChinaXidian Univ, Sch Microelect, Xian 710071, Peoples R China
Zhang Li
[1
]
Jin Gang
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机构:
Xidian Univ, Sch Microelect, Xian 710071, Peoples R ChinaXidian Univ, Sch Microelect, Xian 710071, Peoples R China
Jin Gang
[1
]
机构:
[1] Xidian Univ, Sch Microelect, Xian 710071, Peoples R China
Based on the quasi-two-dimensional (2D) solution of Poisson's equation in two continuous channel regions, an analytical threshold voltage model for short-channel junctionless dual-material cylindrical surrounding-gate (JLDMCSG) metal-oxide-semiconductor field-effect transistor (MOSFET) is developed. Using the derived model, channel potential distribution, horizontal electrical field distribution, and threshold voltage roll-off of JLDMCSG MOSFET are investigated. Compared with junctionless single-material CSG (JLSGCSG) MOSFET, JLDMCSG MOSFET can effectively suppress short-channel effects and simultaneously improve carrier transport efficiency. It is also revealed that threshold voltage roll-off of JLDMCSG can be significantly reduced by adopting both a small oxide thickness and a small silicon channel radius. The model is verified by comparing its calculated results with that obtained from three-dimensional (3D) numerical device simulator ISE.
机构:
Toshiba Co Ltd, Electron Devices Lab, Corp Res & Dev Ctr, Kawasaki, Kanagawa 2128582, JapanToshiba Co Ltd, Electron Devices Lab, Corp Res & Dev Ctr, Kawasaki, Kanagawa 2128582, Japan