A 0.8V 40 Gb/s Novel CMOS Regulated Cascode Trans-impedance Amplifier for Optical Sensing Applications
被引:2
作者:
Hasan, S. M. Rezaul
论文数: 0引用数: 0
h-index: 0
机构:
Massey Univ, Ctr Res Analog & VLSI Microsyst Design, Auckland, New ZealandMassey Univ, Ctr Res Analog & VLSI Microsyst Design, Auckland, New Zealand
Hasan, S. M. Rezaul
[1
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机构:
[1] Massey Univ, Ctr Res Analog & VLSI Microsyst Design, Auckland, New Zealand
来源:
JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY
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2013年
/
72卷
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01期
This paper describes a 0.8 V 700 mu W CMOS low-voltage regulated cascode trans-impedance amplifier (TIA). It reduces the need for extra bias voltages compared to other recent low-voltage regulated cascode topologies. A trans-impedance gain of around 60 dB Omega along with a 40 GHz bandwidth was achieved using the 0.13 mu m IBM CMOS process technology. The input referred noise current spectral density was below within the -3 dB noise bandwidth. Eye diagram simulations using a -53dBm input photo-diode current signal and a 2(31)-1 pseudo random bit sequence data pattern, indicates an eye opening of 90 % at 10Gbit/s and 50 % at 40Gbit/s. This proposed RGC TIA is thus a robust building block for numerous optical sensing applications with low bit error ratio (BER) figure.
机构:
Massey Univ, VLSI Microsyst Res Grp, Inst Informat & Math Sci, Auckland 1311, New ZealandMassey Univ, VLSI Microsyst Res Grp, Inst Informat & Math Sci, Auckland 1311, New Zealand
机构:
Massey Univ, VLSI Microsyst Res Grp, Inst Informat & Math Sci, Auckland 1311, New ZealandMassey Univ, VLSI Microsyst Res Grp, Inst Informat & Math Sci, Auckland 1311, New Zealand