Analysis and Design of a Stacked Power Amplifier With Very High Bandwidth

被引:62
作者
Fritsche, David [1 ]
Wolf, Robert [1 ]
Ellinger, Frank [1 ]
机构
[1] Tech Univ Dresden, Chair Circuit Design & Network Theory, D-01062 Dresden, Germany
关键词
HBT; high voltage/high power (HiVP); long-term evolution (LTE); SiGe BiCMOS; stacked power amplifier (PA); voltage doubler;
D O I
10.1109/TMTT.2012.2209439
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In order to simplify and optimize the design process of stacked amplifiers, this paper presents a novel analytical method to dimension the input network for ideal output behavior. To verify this new structural design process, a fully integrated stacked power amplifier (PA) in 0.25-mu m SiGe BiCMOS technology is proposed. The stacked architecture enables broadband matching networks, therefore the designed PA reaches a very high bandwidth of 800 MHz around 2 GHz. At 2 GHz, the small-signal gain is 23.8 dB. The output power in the 1-dB compression point and the saturated output power are 26.2 and 27.3 dBm, leading to a power-added efficiency (PAE) of 34% and 40%, respectively. Using a long-term evolution (LTE) modulated input signal without any predistortion, the amplifier reaches an average output power of 21 dBm and a PAE of 12%, fulfilling the LTE specifications in terms of adjacent channel leakage ratio and error vector magnitude.
引用
收藏
页码:3223 / 3231
页数:9
相关论文
共 17 条
[1]  
[Anonymous], P IEEE MTT S INT MIC
[2]  
[Anonymous], P EUR MICR INT CIRC
[3]  
[Anonymous], P AS PAC MICR C DEC
[4]  
Ezzeddine A., 1985, 1985 IEEE - MTT-S International Microwave Symposium Digest (Cat. No.85CH2163-4), P336
[5]  
Ezzeddine A.K., 2011, PROC IEEE MTT S INT, P1, DOI DOI 10.1109/MWSYM.2011.5973295
[6]   The high voltage/high power FET (HiVP1) [J].
Ezzeddine, AK ;
Huang, HC .
2003 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS, 2003, :215-218
[7]  
Fathi M, 2010, IEEE CUST INTEGR CIR
[8]   A 20 dBm linear RF power amplifier using stacked silicon-on-sapphire MOSFETs [J].
Jeong, Jinho ;
Pornpromlikit, Sataporn ;
Asbeck, Peter M. ;
Kelly, Dylan .
IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2006, 16 (12) :684-686
[9]   Design and analysis of stacked power amplifier in series-input and series-output configuration [J].
Lei, Ming-Fong ;
Tsai, Zuo-Min ;
Lin, Kun-You ;
Wang, Huei .
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2007, 55 (12) :2802-2812
[10]   A 31-dBm, High Ruggedness Power Amplifier in 65-nm Standard CMOS with High-Efficiency Stacked-Cascode Stages [J].
Leuschner, Stephan ;
Pinarello, Sandro ;
Hodel, Uwe ;
Mueller, Jan-Erik ;
Klar, Heinrich .
2010 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS RFIC SYMPOSIUM, 2010, :395-398