160 MS/s 20 MHz bandwidth third-order noise shaping SAR ADC

被引:12
作者
Ghaedrahmati, Hanie [1 ]
Zhou, Jianjun [1 ]
机构
[1] Shanghai Jiao Tong Univ, CARFIC Lab, SEIEE, Shanghai, Peoples R China
关键词
analogue-digital conversion; operational amplifiers; passive networks; comparators (circuits); thermal noise; digital-analogue conversion; CMOS integrated circuits; low-power electronics; third-order noise shaping SAR ADC; operational-amplifier; embedded passive gain technique; noise shaping successive approximation register; comparator noise; quantisation noise; settling error; DAC thermal noise; CMOS technology; passive element; capacitor; switch; oversampling scheme; shaping scheme; bandwidth; 20; MHz; size; 40; nm;
D O I
10.1049/el.2017.3969
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This Letter proposes an operational-amplifier free with an embedded passive gain technique to implement an oversampling, noise shaping successive approximation register (SAR) ADCs. In the proposed scheme, the comparator noise, quantisation noise, settling errors and DAC thermal noise are alleviated. A third-order noise shaping SAR ADC with inserted passive gain design in 40 nm CMOS technology is well suited for low power application because of using passive elements like capacitors and switches. Due to the oversampling and shaping scheme, the structure can be used for high-speed and high-resolution operation.
引用
收藏
页码:128 / 130
页数:2
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