Enhanced structure of second-order generalized integrator frequency-locked loop suitable for DC-offset rejection in single-phase systems

For the proper operation of a microgrid, an accurate estimation of the grid parameters such as phase angle, operating frequency and amplitude under various disturbances is of prime interest. In this paper, an enhanced second-order generalized integrator-based frequency-locked loop (ESOGI-FLL) intended for DC-offset rejection in both grid-connected and islanded operation of a single-phase voltage source inverter (VSI) is presented. The main contribution in this work is the ability of the proposed scheme to remove the overall uninspected distortion in the orthogonal component and oscillations that affect the estimated frequency and phase caused mainly by the inherent DC-offset in the input voltage. Unlike the most popular PLLs dealing with DC-offset rejection, the proposed scheme has a great advantage in term of structure complexity and computational time. Numerical simulations as well as practical assessments are carried out to highlight the effectiveness and robustness of the proposed scheme in term of parameters estimation of highly shifted input voltage. In addition, the proposed scheme is tested against corrupted input voltage such as frequency change, phase jump and voltage sags. The paper also reports a detailed comparative study with conventional SOGI-FLL and third-order generalized integrator based FLL. The obtained results have shown best performances of the proposed ESOGI-FLL in term of DC-offset rejection in the orthogonal component, ripples elimination in the estimated frequency and less computational time.