Correction of Delay-Time-Induced Maximum Junction Temperature Offset During Electrothermal Characterization of IGBT Devices

被引:18
作者
Deng, Erping [1 ,2 ]
Borucki, Ludger [3 ]
Lutz, Josef [1 ]
机构
[1] Tech Univ Chemnitz, Chair Power Elect, D-09126 Chemnitz, Germany
[2] North China Elect Power Univ, State Key Lab Alternate Elect Power Syst Renewabl, Beijing 102206, Peoples R China
[3] Infineon Technol AG, D-81726 Munich, Germany
关键词
Temperature measurement; Junctions; Heating systems; Insulated gate bipolar transistors; Delays; Cooling; Temperature sensors; Correction methods; delay time; maximum junction temperature offset; power cycling test (PCT);
D O I
10.1109/TPEL.2020.3011175
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The lifetime evaluation is strongly influenced by the measurement accuracy of the junction temperature with theVce(T) method during power cycling test (PCT). However, the measurement delay time tmd, the time between which the load current is switched OFF and the test pulse is applied, induces a maximumjunction-temperature offset.Tjm. The JEDEC [1] suggested square root t method is found only to be suitable for devices with surface-close heat generation and will induce errors for other devices such as IGBTs. In this article, two novel methods, the simulated.Zth and the Cauer thermal model, are proposed. The principle and accuracy of these two methods are discussed in detail. Furthermore, themeasured Zth curve, or the Foster thermal model method, is proven not suitable for the correction of the maximum junction-temperature offset, as it will induce the same error as the square root t method.
引用
收藏
页码:2564 / 2573
页数:10
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