VOP: Architecture of a Processor for Vector Operations in On-line Learning of Neural Networks

In this paper we propose architecture of a processor for vector operations involved in on-line learning of neural networks. We target to implement on-line learning on a Radial Basis Function Neural Network ( RBFNN) based Face Recognition ( FR) system that has pseudo inverse computation as an essential component during training. Synaptic weights of RBFNN output layer need to be updated whenever the FR system comes across a new face to be learnt. For real-time on-line learning, update of synaptic weights is done using an existing Incremental Pseudo Inverse ( IPI) algorithm in the place of compute intensive pseudo inverse algorithm. We design a custom data-path for vector operations appearing in IPI algorithm. The custom data-path along with configuration and memory access mechanisms forms a processing unit, termed Processor for Vector Operations ( VOP). We simulate and synthesize VOP to target Virtex-6 FPGA using the Xilinx ISE. Apart from on-line learning, the VOPs can be used in acceleration of several applications involving predominant vector-matrix operations.