Efficient Hardware Implementation of Morphological Reconstruction based on Sequential Reconstruction Algorithm

被引:4
作者
Anacona-Mosquera, Oscar [1 ]
Vinhal, Gustavo [2 ]
Sampaio, Renato C. [1 ]
Teodoro, George [2 ]
Jacobi, Ricardo P. [2 ]
Llanos, Carlos H. [1 ]
机构
[1] Univ Brasilia, Dept Mech Engn, Brasilia, DF, Brazil
[2] Univ Brasilia, Dept Comp Sci, Brasilia, DF, Brazil
来源
2017 30TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN (SBCCI 2017): CHOP ON SANDS | 2017年
关键词
IWPP; Sequential Reconstruction; FPGA; STRUCTURAL SIMILARITY;
D O I
10.1145/3109984.3110020
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work presents a hardware implementation of the morphological reconstruction algorithm for biomedical images analysis. The morphological reconstruction algorithm is based on the Sequential Reconstruction (SR). In this case, a hardware architecture has been developed and implemented by mapping the SR algorithm into an Altera Cyclone IV E FPGA based platform, including a NIOS II processor. The developed architecture has been described in VHDL language, and it is scalable for image sizes from 96 x 96 pixels to 288 x 288 pixels using a neighboring element of 3 x 3. The quality evaluation of the yielded images was achieved by using SR-SIM (Spectral Residual Based Similarity) metric, which has also been used for visual verification of the images.
引用
收藏
页码:162 / 167
页数:6
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