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- [21] Hardware-Accelerated Reconstruction of Compressed Neural Signals Based on Inpainting PROCEEDINGS OF THE 23RD INTERNATIONAL CONFERENCE ON MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (MIXDES 2016), 2016, : 399 - 404
- [22] Efficient Hardware Implementation of the LEDAcrypt Decoder IEEE ACCESS, 2021, 9 : 66223 - 66240
- [23] Efficient Hardware Implementation of RSA Cryptography PROCEEDINGS OF THE 3RD INTERNATIONAL CONFERENCE ON ANTI-COUNTERFEITING, SECURITY, AND IDENTIFICATION IN COMMUNICATION, 2009, : 316 - 319
- [24] Fast and Efficient Hardware Implementation of HQC SELECTED AREAS IN CRYPTOGRAPHY - SAC 2023, 2024, 14201 : 297 - 321
- [25] Efficient Hardware Implementation of Secure Hash Algorithm (SHA-3) Finalist - Skein FRONTIERS IN COMPUTER EDUCATION, 2012, 133 : 933 - 940
- [27] FPGA dedicated hardware architecture of 3D image reconstruction: marching cubes algorithm 2014 WORLD SYMPOSIUM ON COMPUTER APPLICATIONS & RESEARCH (WSCAR), 2014,
- [28] FPGA based Hardware Implementation of Hybrid Cryptographic Algorithm for Encryption and Decryption 2017 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, COMMUNICATION, COMPUTER, AND OPTIMIZATION TECHNIQUES (ICEECCOT), 2017, : 416 - 419
- [30] Design, Implementation and Analysis of Efficient Hardware-based Security Primitives 2020 IFIP/IEEE 28TH INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2020, : 198 - 199