Miller and noise effects in a synchronizing flip-flop

被引：68

作者：

Dike, C ^{[1
]}

Burton, E ^{[1
]}

机构：

[1] Intel Corp, Hillsboro, OR 97124 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1999年 / 34卷 / 06期

关键词：

metastability; Miller coupling; synchronizer; thermal noise;

D O I：

10.1109/4.766819

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The effects of Miller coupling and thermal noise on a synchronizing flip-flop are described. Data on the metastability characteristics of the flip-flop are gathered and analyzed. True metastability is distinguished from the deterministic region. A worst case mean-time-between-failure bound is established. A simple and accurate test method is presented. A simple jamb latch was used with driving circuits of two different strengths to determine the role of input strength on T-w and tau. The flip-flop was fabricated on a 0.25-mu m CMOS process.

引用

页码：849 / 855

页数：7

共 5 条

[1] SYNCHRONIZATION RELIABILITY IN CMOS TECHNOLOGY [J].