A Generalization of a Fast RNS Conversion for a New 4-Modulus Base

被引：23

作者：

Didier, Laurent-Stephane ^{[1
]}

Rivaille, Pierre-Yves ^{[1
]}

机构：

[1] Univ Paris 06, Lab Informat Paris 6, Paris, France

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2009年 / 56卷 / 01期

关键词：

FPGA design; moduli sets; residue number systems (RNS); residue-to-binary converter; BINARY CONVERTER; RESIDUE; 2(N)-1; DESIGN;

D O I：

10.1109/TCSII.2008.2010157

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A generalization of a new generic 4-modulus base for residue number systems (RNS) is presented in this paper. An efficient RNS to binary conversion algorithm and a hierarchical architecture for these bases are also described. The key features of our conversion architecture compared to previous published architectures of the same output range are a larger moduli set selection and savings on the critical delay, area and power. The FPGA implementation and the detailed proof supporting it are also discussed.

引用

页码：46 / 50

页数：5

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