LC-VCO Design Automation Tool for Nanometer CMOS Technology

被引：0

作者：

Siwiec, Krzysztof ^{[1
]}

Borejko, Tomasz ^{[1
]}

Pleskacz, Witold A. ^{[1
]}

机构：

[1] Warsaw Univ Technol, Inst Microelect & Optoelect, PL-00662 Warsaw, Poland

来源：

2012 IEEE 15TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS) | 2012年

关键词：

PHASE NOISE; LO GENERATION; OSCILLATORS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper a low-voltage LC voltage-controlled oscillator (VCO) design automation tool has been presented. The tool is based on design methodology, which takes under consideration trade-offs between power consumption, phase noise and tuning range. NMOS only architecture is considered because of its capability to work with low supply voltages. One of the goals, while creating the tool, was to make it technology independent. This was achieved by creating SKILL scripts that allows fast configuration of design library for specified technology. Trade-offs between power consumption, phase noise and tuning range are analyzed and based on them design flow has been proposed. Finally two design examples in 90 and 130 nm CMOS technology have been presented.

引用

页码：68 / 73

页数：6

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