An Energy Efficient AES Encryption Core for Hardware Security Implementation in IoT Systems

被引：0

作者：

Manh-Hiep Dao ^{[1
,3
]}

Van-Phuc Hoang ^{[1
]}

Van-Lan Dao ^{[1
]}

Xuan-Tu Tran ^{[2
]}

机构：

[1] Le Quy Don Tech Univ, 236 Hoang Quoc Viet Str, Hanoi, Vietnam

[2] VNU Univ Engn & Technol, SISLAB, 144 Xuan Thuy Rd, Hanoi, Vietnam

[3] Viettel IC Design Ctr, Viettel Grp, Hanoi, Vietnam

来源：

2018 INTERNATIONAL CONFERENCE ON ADVANCED TECHNOLOGIES FOR COMMUNICATIONS (ATC) | 2018年

关键词：

AES; ASIC; low energy; Internet of Things;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a low energy AES encryption core targeting for hardware security implementation in IoT systems. The proposed AES core architecture employs the improved shared S-box scheme with 32-bit datapath and low switching activity shift-row operation. Consequently, the proposed AES encryption core can provide good tradeoff with the area of 4.3 kgates and the energy consumption of 4 pJ/bit in 32 nm CMOS technology library.

引用

页码：301 / 304

页数：4

共 50 条

[1] An AES-GCM Authenticated Encryption Crypto-Core for IoT Security
Sung, Byung-Yoon
Kim, Ki-Bbeum
Shin, Kyung-Wook
2018 INTERNATIONAL CONFERENCE ON ELECTRONICS, INFORMATION, AND COMMUNICATION (ICEIC), 2018, : 285 - 287
[2] FPGA Implementation of Efficient AES Encryption
Priya, S. Sridevi Sathya
Kumar, P. Karthigai
SivaMangai, N. M.
Rejula, V.
2015 INTERNATIONAL CONFERENCE ON INNOVATIONS IN INFORMATION, EMBEDDED AND COMMUNICATION SYSTEMS (ICIIECS), 2015,
[3] Architecture design and hardware implementation of AES encryption algorithm
Wei, Hongling
Li, Hongyan
Chen, Mingying
2020 5TH INTERNATIONAL CONFERENCE ON MECHANICAL, CONTROL AND COMPUTER ENGINEERING (ICMCCE 2020), 2020, : 1611 - 1614
[4] An Efficient FPGA Implementation of AES-CCM Authenticated Encryption IP Core
Thi-Thanh-Dung Phan
Van-Phuc Hoang
Van-Lan Dao
2016 3RD NATIONAL FOUNDATION FOR SCIENCE AND TECHNOLOGY DEVELOPMENT CONFERENCE ON INFORMATION AND COMPUTER SCIENCE (NICS), 2016, : 202 - 205
[5] Design and implementation of low-area and low-power AES encryption hardware core
Hamalainen, Panu
Alho, Tirno
Hannikainen, Marko
Hamalainen, Tirno D.
DSD 2006: 9TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: ARCHITECTURES, METHODS AND TOOLS, PROCEEDINGS, 2006, : 577 - +
[6] Energy efficient distributed lightweight authentication and encryption technique for IoT security
Sudhakaran, Pradeep
Malathy, C.
INTERNATIONAL JOURNAL OF COMMUNICATION SYSTEMS, 2022, 35 (02)
[7] Atomic-AES: A Compact Implementation of the AES Encryption/Decryption Core
Banik, Subhadeep
Bogdanov, Andrey
Regazzoni, Francesco
PROGRESS IN CRYPTOLOGY - INDOCRYPT 2016, 2016, 10095 : 173 - 190
[8] Hardware implementation of AES encryption and decryption system based on FPGA
Zhu, Shihai
Open Cybernetics and Systemics Journal, 2015, 9 (01): : 1373 - 1377
[9] A High Performance Hardware Implementation Image Encryption With AES Algorithm
Farmani, Ali
Jafari, Mohamad
Miremadi, Seyed Sohrab
THIRD INTERNATIONAL CONFERENCE ON DIGITAL IMAGE PROCESSING (ICDIP 2011), 2011, 8009
[10] Design and Implementation of AES on FPGA for Security of IOT Data
Bhoyar, Dinesh B.
Wankhede, Shelly R.
Modod, Swati K.
4TH INTERNATIONAL CONFERENCE ON INTERNET OF THINGS AND CONNECTED TECHNOLOGIES (ICIOTCT), 2019: INTERNET OF THINGS AND CONNECTED TECHNOLOGIES, 2020, 1122 : 376 - 383

← 1 2 3 4 5 →